
REV. 0
–6–
AD5426/AD5432/AD5443
PIN CONFIGURATION
I
OUT
1
1
10
R
FB
SDIN
5
6
SYNC
SCLK
4
7
SDO
GND
3
8
V
DD
I
OUT
2
2
9
V
REF
AD5426/
AD5432/
AD5443
(Not to Scale)
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Function
1
2
3
4
I
OUT
1
I
OUT
2
GND
SCLK
DAC Current Output.
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
Ground Pin.
Serial Clock Input. By default, data is clocked into the input shift register on the falling edge of the serial
clock input. Alternatively, by means of the serial control bits, the device may be configured such that data is
clocked into the shift register on the rising edge of SCLK.
Serial Data Input. Data is clocked into the 16-bit input register on the active edge of the serial clock input.
By default, on power-up, data is clocked into the shift register on the falling edge of SCLK. The control bits
allow the user to change the active edge to rising edge.
Active Low Control Input. This is the frame synchronization signal for the input data. When
SYNC
goes
low, it powers on the SCLK and DIN buffers, and the input shift register is enabled. Data is loaded to the
shift register on the active edge of the following clocks (power-on default is falling clock edge). In standalone
mode, the serial interface counts clocks and data is latched to the shift register on the 16th active clock edge.
Serial Data Output. This allows a number of parts to be daisy-chained. By default, data is clocked into the
shift register on the falling edge and out via SDO on the rising edge of SCLK. Data will always be clocked
out on the alternate edge to loading data to the shift register. Writing the Readback control word to the
shift register makes the DAC register contents available for readback on the SDO pin, clocked out on the
opposite edges to the active clock edge.
Positive Power Supply Input. These parts can be operated from a supply of 3 V to 5.5 V.
DAC Reference Voltage Input.
DAC Feedback Resistor pin. Establish voltage output for the DAC by connecting to external amplifier output.
5
SDIN
6
SYNC
7
SDO
8
9
10
V
DD
V
REF
R
FB